ESA Open Invitation To Tender AO8526
Open Date: 07/12/2015
Closing Date: 10/02/2016

Status: ISSUED
Reference Nr.: 15.1EP.02
Prog. Ref.: TRP
Budget Ref.: E/0901-01 – TRP
Special Prov.: BE+DK+FR+DE+IT+NL+ES+SE+CH+GB+IE+AT+NO+FI+PT+GR+LU+CZ+RO+PL+EE+HU
Tender Type: C
Price Range: 200-500 KEURO
Establishment: ESTEC
Directorate: Directorate of Technical & Quality Manag
Department: Electrical Engineering Department
Division: Power & Energy Conversion Division
Contract Officer: Ferreol, Audrey
Last Update Date: 07/12/2015
Update Reason: Tender issue

In terrestrial electronics, a number of technological solutions have been developed and verified to allow direct (power) SMD EEE components mounting on PCBs with very good thermal conduction properties to the applicable thermal sink/baseplate. There are differentprinciples (from rather basic – Insulated Thermal Substrates to Filled Thermal Vias, combination of Microvias and Buried Vias – to advanced approaches – including micro heat pipes embedded in PCBs). See for example the information provided at the following web links: a. http://www.we-online.de/web/en/leiterplatten/webinare/archiv/waermemanagement_webinar/webinar_archiv_4.php b. http://www.bergquistcompany.com/thermal_substrates/t-clad-product-overview.htm c. http://doc.utwente.nl/77481/1/advances_in_integrated.pdf The interest in this activity is not only due to the reduction of the thermal path from power component to thermal sink (a reduction of therelevant thermal resistance by a factor 2 allows to use the same device to 2 times the original dissipated power), but also: 1. outstanding reduction in manufacturing costs due to full automated SMD mounting (also for power devices), without the efforts in design, layout, manufacturing and control of mounting through-hole packages to structure (stiffeners, etc – see example b. above); 2. likely optimal control of CTE mismatch also for large SMD packages (see example a. above). Plan of work: 1. Survey of terrestrial best practices to mount dissipative components directly on PCBs and heat transfer methods to baseplate. 2. Selection of most promising approaches checking their applicability for space apps. 3. Test verification of most promising methods. The activity is proposed by TEC-EPM (leading technical officer, ensuring the application/system level view); substantial expert support and contribution is expected from TEC-QTM and TEC-QTC, to cover space feasibility and material/component engineering aspects.

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