19, March 2019

ESA Open Invitation to Tender AO9735
Open Date: 11/03/2019
Closing Date: 24/04/2019 13:00:00

Status: ISSUED
Reference Nr.: 19.1ET.03
Prog. Ref.: GSTP Element 1 Dev
Budget Ref.: E/0904-611 – GSTP Element 1 Dev
Special Prov.: AT+RO
Tender Type: C
Price Range: > 500 KEURO
Products: Ground Segment / Ground Station / Baseband equipment / Telemetry and Telecommand equipment, Tracking, Ranging and Doppler measurement equipment, CODECS, … / Ground Segment / Development and Construction of Space Segment / Assembly Integration and Test / Electrical Ground Support Equipment (EGSE) and Special Check Out Equipment (SCOE)
Techology Domains: RF Systems, Payloads and Technologies / TT&C and Payload Data Modulator (PDM) Systems/Subsystems / TT&C System Tools / System Design & Verification / System Verification and AIT / Ground Support Equipment / Ground Station Systems and Networks / Ground Station System / TT&C, Radar and Optical Signal & Data Processing
Establishment: ESTEC
Directorate: Directorate of Tech, Eng. & Quality
Department: Electrical Department
Contract Officer: Erkelens-Sickinger, Franziska
Industrial Policy Measure: N/A – Not apply
Last Update Date: 11/03/2019
Update Reason: Loaded a new Clarification(English version)

With the ever-growing processing capabilities of modern GPPs (e.g. Intel i7 type CPUs), it is possible to run the various signal processing modules of a TTC modem on a standard commercial-off-the-shelf (COTS) commodity computer, and to do this in realtime. Said processing modules are defined by standardization bodies, such as CCSDS and ECSS. The RF-frontend may transfer the digitized RF signals from/to the ADC/DAC through standard interfaces like Ethernet or USB to/from the PC platform. This approach will have the major advantage of completely decoupling the signal processing functions implemented now in SW from the underlying HW which will only be in charge of converting digitized signal into analogue ones and vice versa. This will guarantee a high re-configurability of the modem to different applications and to different requirements with only SW modifications (no HW changes, including for example FPGA reprogramming). The software implementation of the TTC signal processing modules and the realtime streaming of digitized samples from/to ADC/DAC are the focus of this activity, thus standard off-the-shelf HW platform will be used (i.e. no specific HW development is considered). In particular, concerning SW implementation, the following processing aspects will be covered in the frame of the activity: – TC-frontend implementation: algorithms study and SW development for TC packet encapsulation, channel coding, and modulation – TM-frontend implementation: algorithms study and SW development for samples synchronization, demodulation, and channel decoding – Ranging processor capabilities analysis and identification of possible implementations: identification of solutions for rangingsignal processing (uplink vs downlink correlation) and implementation of identified solutions. Higher level processing (e.g. frames/packet management or processing) may also be considered as part of the task, but this is not mandatory. I.e. the decoded data for TM and pre-coded packet for TC can be considered as input/output of the modem (this is a typical approach for a RF-SCOE application). Because of the prototype approach, only a deliberately reduced number of modulation and coding schemes, with respect to all possible schemes foreseen by ECSS and CCSDS standards, shall be selected for implementation as part of this activity. The most commonlyused (i.e. residual carrier schemes and BPSK/QPSK) shall be included as a minimum in the baseline, to make this prototype fully representative. A complete set of modulations shall be considered in a follow-up of this activity. As final task, the developed SW willbe validated first using test vectors or sampled signals and then it shall be demonstrated on an existing HW platform, by processing real RF signal.

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