There are non hermetic chip and wire solutions with good reliability in moist environment. When the die is large, to manage the thermo-mechanical stresses between die and substrate, the die is mounted on a ceramic sub-mount. In this case the area increase sensibly leading to a situation where the intrinsic integration advantage of CSP or MCM-L is lost. Going toward the needed large area and high pin count dies flip-chip would be the best interconnection candidate. This absolutely requires an assessment of a solution usinga low TCE substrate to minimize the stress on the bumps, bumps made of high fatigue resistance alloy, and at the same time High Density Interconnect (HDI) with micro vias. Procurement Policy: C(1) = Activity restricted to non-prime contractors (incl. SMEs). For additional information please go to EMITS news (dated 05/02/2001) “Industrial Policy measures for non-primes, SMEs and R&D entities in ESA programmes”.
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