22, October 2020

ESA Open Invitation to Tender AO10450
Open Date: 21/10/2020
Closing Date: 15/01/2021 13:00:00

Status: ISSUED
Reference Nr.: 20.1TI.06
Prog. Ref.: OP-Other Act. CC
Budget Ref.: E/0534-05A – OP-Other Act. CC
Tender Type: C
Price Range: 200-500 KEURO
Products: Satellites & Probes / Optical Communication / Optical Comm ¿ BB / Software
Technology Domains: Optoelectronics / Laser Technologies / Laser Sources
Establishment: ESTEC
Directorate: Directorate Telecom & Integrated Applica
Department: Telecom Technologies,Product&Systems Dep
Division: Institutional and European Programme Off
Contract Officer: Piesche, Claudia Ria
Industrial Policy Measure: N/A – Not apply
Last Update Date: 21/10/2020
Update Reason: Tender issue

The objective of the activity is to design, implement, verify and validate, and test an Intellectual Property (IP) Core implementing two telemetry waveforms developed for optical communication in the frame of the Consultative Committee for Space Data Systems. Thefirst specification, referred to as High Photon Efficiency, is a recommended standard in CCSDS 142.0-B-1, the second specification is referred to as Optical On Off Keying. Targeted Improvements: New market opportunities for the optical terminal and equipment manufactures. Description: The Consultative Committee for Space Data Systems (CCSDS) is currently developing a number of standards to be implemented by optical payload data transmitters (PDTs) for different telemetry link scenarios. Recently, the CCSDS 142.0-B-1 coding and synchronisation specification for High Photon Efficiency (HPE) (i.e. photon starved links) was published. It is based on pulsed position modulation (PPM) and a Forward Error Correction (FEC) coding which belongs to the general serial Turbo code family (Serially Concatenated Pulsed Position Modulation, SCPPM). In parallel, the CCSDS is also developing a standard for optical LEO DTE linksbased on optical On Off Keying (O3K). The O3K specification covers a wide range of symbol rates between 1 Msymbol/s and10 Gsymbols/s. Both the HPE and O3K coding and synchronisation layers perform similar functions such as randomisation, FEC coding, long channel interleaving, framing and signalling in order to implement a pulsed modulation at the physical layer. The IP Core willbe technology independent, implementable in different application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA) technologies. The IP Core shall be validated on COTS FPGA breadboard and tested against software based results. The final IP Cores shall be added to the ESA IP Cores portfolio available for use in ESA member and participant states space research and/or commercial use.

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