11, July 2016

ESA Open Invitation To Tender AO8563
Open Date: 08/07/2016
Closing Date: 30/09/2016 13:00:00

Status: ISSUED
Reference Nr.: 15.1ED.03
Prog. Ref.: TRP
Budget Ref.: E/0901-01 – TRP
Tender Type: C
Price Range: > 500 KEURO
Products: Satellites & Probes / On-board Data Management / On Board Data Management ¿ BB / Other
Technology Domains: On-board Data Systems / Microelectronics for Digital and Analogue Applications / Digital and Analogue Devices and Technologies
Establishment: ESTEC
Directorate: Directorate of Technical & Quality Management
Department: Electrical Engineering Department
Division: Data Systems Division
Contract Officer: Fabrizi, Lavinia
Industrial Policy Measure: N/A – Not apply
Last Update Date: 08/07/2016
Update Reason: Tender issue

The aim of this activity is to develop for instrumentation and AOCS applications a radiation tolerant adaptable mixed-signal frontend that interfaces the sensor/actuator to the digital signal processing devices like the FPGA anduC. Space mixed-signal radiation tolerant front-end performance for sensor and control for instrumentation and AOCS are limited by the supply of disparate analogue and mixed-signal components. Higher bandwidth, dynamic range, signal to noise and observability can be obtained with dedicated front-ends that are tuned to maximum sensitivity per bandwidth and dedicated calibration and tracking of the signal amplification, conditioning and conversion blocks. Previous ESA CTP developments have provided high-performance adaptable low noise and power amplifiers as well as configurable ADC and DAC for a 50kHz to 50MHz bandwidth. Some of these IP blocks have been already selected for the dedicated Earth Observation high performance converter and Scalable Sensor Data Processor for high performance ad-hoc analogue to digital signal conversion. This activity seeks to analyse the current AOCS, intrumentation and control front-ends and provide a superior performance mixed-signal front-end adaptable to the selected application domains. The front-end should interface at one side with the analogue world and on the other with the digital in the form of a uC, FPGA or processor. The activity should provide for the selected operating frequency range the adaptable mixed-signal front-end prototype to the European mixed-signal FPGA. The activity is broken down into the following objectives:(i) identify the required configurability, adaptability and scalability for sensor and actuator front-ends for instrumentation and AOCS applications(ii) develop the interconnect matrix for the available high-performance amplifiers, filters and data converters IP to realise the front-end configurability.(iii) manufacture and test a prototype front-end ASIC for the selected applications.

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