N CHANNEL LATCHING CURRENT LIMITER
12, iulie 2021

ESA Open Invitation to Tender: 1-10867
Open Date: 09/07/2021 09:53 CEST
Closing Date: 17/09/2021 17:00 CEST

The overall conversion path in a power unit comprises not only conversion stages but also many protection devices. In the base of Battery Charge Regulators (BCR) and Battery Discharge Regulators (BDR), a protection is typically needed at the input and at the output. Thus, two additional devices will be added to the path and, as a consequence, it will have a significant impact on the efficiency.It has to be noted that, for simplicity, those protections are implemented with P channel MOSFETs. The downside of this choice is the largest Rds(on) and the higher losses. In many cases, the protection devices is where the highest dissipation is concentrated. Power units have by nature a very high dissipation level. Reducing the losses is a key aspect to simplify the thermal design. The input and output protection of BCR and BDR modules has been identified as a key point to reduce the dissipation. This development will reduce the module dissipation by close to 50%.The activity will focus on the development of an N channel LCL for BCR/BDR protection. An N-channel LCL will have the difficulty of needing a supply voltage on top of the voltage rail (Battery / Main Bus) to bias the MOSFET gate source. The implementation of this auxiliary voltage is a key part of this development since its simplicity is a key aspect. Moreover, the MOSFET source will be connected to the output of the LCL meaning that all sense and control circuit will see that large common mode voltage range when the LCL turns on/off. The LCL on/off control inputs have to be level shifted to refer topower ground. Since the driving scheme is different and the MOSFET has different characteristics, the dynamic performance of the circuit will have to be carefully analysed, as well as its stability and its thermal performance.The following tasks are foreseen in the frame of this activity: Design the High side supply of an LCL based on N-channel MOSFET Thermal calculation of the LCL MOSFET when Main Bus capacitance is charged upon switch on Develop simulation model with thermal properties for LCL with Nchannel MOSFET Design of the LCL with N-channel MOSFET Design a MOSFET gate drive able to drive many MOSFETs in parallelas needed Ensure stability of LCL current loop into BDR and BCR and ensure LCL current loop stability when tested via test connector and externalload- Build and test in Thermal Vacuum an EMProcurement Policy: C(1) = Activity restricted to non-prime contractors (incl. SMEs). For additional information please go to this link.

Directorate: Directorate of Tech, Eng. Quality
Estabilishment: ESTEC
ECOS Required: No
Classified: No
Price Range: > 500 KEURO
Authorised Contact Person: Franziska Isabella Erkelens-Sickinger
Initiating Service: TEC-EPM
IP Measure: C1
Prog. Reference: E/0904-611 – GSTP Element 1 Dev
Tender Type: Open Competition
Open To Tenderers From: BE+DE
Technology Keywords: 23-B-II-Silicon-Based Components
Products Keywords: 2-B-1-h-Monolithic Microcircuits (including MMICs)

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