ESA Open Invitation To Tender AO8279
Open Date: 16/04/2015
Closing Date: 29/05/2015

Status: ISSUED
Reference Nr.: 14.1EP.02
Prog. Ref.: TRP
Budget Ref.: E/0901-01 – TRP
Special Prov.: B+DK+F+D+I+NL+E+S+CH+GB+IRL+A+N+FIN+POR+GR+LUX+CZ+RO+PL
Tender Type: C
Price Range: 200-500 KEURO
Establishment: ESTEC
Directorate: Directorate of Technical & Quality Manag
Department: Electrical Engineering Department
Division: Power & Energy Conversion Division
Contract Officer: van Hilten, Linda
Last Update Date: 16/04/2015
Update Reason: Tender issue

To identify and investigate means by which the lower operational and survival temperature limits of critical electronics might be extended in support of future exploration missions and their survivability. Future exploration missions (Moon, Mars, NEO) can face extreme temperature conditions that in some cases drive the amount of payload that can be carried. For example during Lunar Nights, external temperatures can drop to -200°C during several hundreds of hours. To survive such external conditions the solution usually lies in carrying heavy batteries in addition to a complex thermal architecture (involving heat switches etc.). One driving parameter of the required energy storage capability is the minimum Operational and Non Operational temperatures allowed by electronic units (usually -20°C/-40°C). In Europe, studies on the subject focusing on the possibility to decrease the Survival Temperature of sensitive electronics and cycles down to -120°C have been performed. Some promising mounting solutions have been identified (e.g. System on Chip) and characterisation of elementary chips has been carried out, but so far there has not been a systematic research of specific designs to expand the classical Operational Temperature of electronic boxes down to temperatures < -60°C. The first part of this activity will be devoted to analysing the design of two representative standard electronic boxes and to identify the driving parameters for the low temperature operational limits (mounting, chips low temperature performances etc.). Then, the Contractor will perform a state of the art survey of: – Mounting solutions and materials that can sustain large temperature range (below -70°C to 50°C). – Chips performances at low temperature. The activity shall include the recommendation of a breadboard test campaign to inform the evaluation of the performance and implementation of the proposed design solutions. Specific elements of those recommended breadboard/testing activities shall be carried out within the frame of this activity. In the last part, by selecting the most adapted mounting techniques and set of chips, two alternate designs that can operate at T°<-60°C of the electronic boxes will be proposed.

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