ESA Open Invitation to Tender: 1-10747
Open Date: 08/09/2021 15:42 CEST
Closing Date: 03/11/2021 13:00 CEST

Present and future multispectral/hyperspectral instruments produce an extensive amount of data at high data rates. The limitations in bandwidth and on-board storage require reduction of data volume prior to transmission. The CCSDS 123.0-B-2 standard, issued in 2019, describes a method for low-complexity lossless and near-lossless compression for multi-/hyperspectral images which achieves high compression ratios by enabling quantization of the data. Near-lossless compression offers much higher compression ratios (>10) than lossless methods, and unlike lossy methods, it does not compromise the quality of the data. The maximum quantization error can be restricted to remain below the instrumental noise level in each pixel, thus preserving the original SNR. The low complexity and the exceptional image quality performance (not offered by current compression solutions for space), makes this solution very appealing for a wide range of applications, including also 2D image compression. Its main application domain is not only Earth Observation (multi/hyperspectral payloads), but also Space Weather, Science and Exploration where is identified as an enabling technology (also adapted to time series, panchromatic 2D images, spectrometer data…). Such methods can only be exploited if hardware implementations exist. The goal of this activity is to implement the compression method described in CCSDS 123.0-B-2 as a reusable VHDL IP core. A reusable hardware implementation will offer the flexibility for the deployment on several missions and on different devices, such as FPGAs from different vendors including COTS and ASICs, providing savings in mission costs. Additionally, it reduces the need for ad-hoc software designs and provides significantly increased performance and savings in power consumption compared to software implementations.This activity encompasses the following tasks:-Architectural study of the standard: optimal trade-off between compression parameters and hardware complexity-Description of the IP core in VHDL and System C model-Development of user-friendly configuration tool based on specific mission requirements-Verification against software reference model-Synthesis on selected FPGA devices: space-qualified BRAVE, RTG4 and COTS (Xilinx)-Laboratory demonstratorThe IP core will be offered to future missions and projects as part of the ESA IP Core’s portfolio, making it accessible also for small companies (newspace).Procurement Policy: C(2) = A relevant participation (in terms of quality and quantity) of non-primes (incl. SMEs) is required. For additional information please go to this link.

Directorate: Directorate of Tech, Eng. Quality
Estabilishment: ESTEC
ECOS Required: No
Classified: No
Price Range: 200-500 KEURO
Authorised Contact Person: Christophe Rene R. Seynaeve
Initiating Service: TEC-EDM
IP Measure: C2
Prog. Reference: E/0901-01 – Technology Developme
Tender Type: Open Competition
Open To Tenderers From: AT+BE+CH+CZ+DE+DK+EE+EL+ES+FI+FR+GB+HU+IE+IT+LU+NL+NO+PL+PT+RO+SE
Technology Keywords: 23-A-I-Evaluation and Testing / 23-B-IV-Optoelectronic Active and Passive Components
Products Keywords: 2-B-1-i-Hybrid circuits / 2-B-1-p-Optoelectronic Devices (including opto-couplers, LED, CCDs, displays, sensors)