ESA Open Invitation to Tender: 1-10724
Open Date: 07/12/2021 17:35 CEST
Closing Date: 24/03/2022 13:00 CEST

The objective of the activity is to specify, trade-off and evaluate high voltage coating isolation technology for state of the art high voltage power converters used in telecommunication satellites, such as those used for travelling wave tube amplifiers and electric propulsion.Targeted Improvements: Mass reduction of high voltage modules > 50%;- Enabling the use of surface mounted devices on high voltage printed circuit boards;- Enabling technology for high volume automated production.Description: High voltage power modules used in telecommunication spacecraft platforms and payloads are typically fully potted. Current state of the art potting processes are used in space applications to provide electrical insulation and facilitate the thermal drain. For the payload, the potting is a significant contributor to the overall mass. For the equipment, it is an important driver for manufacturing time and effort. A printed circuit board (PCB), including its components, is immersed into a liquid resin, which cures to a solid block. Despite the advantages, there is market demand to use a wider range of surface mounted components, which may struggle with the thermomechanical forces inside a massive high voltage module. Additionally, the typical manufacturing process is very complex. Small changes in the design might require a complete re-engineering and very long evaluation phases to demonstrate the suitability of the design with respect to lifetime and quality requirements. Repair ability is limited and inspection is challenging. A broad range of coating processes exist for conformal coating of printed circuit boards. This is a standard technique for space electronics, but currently is limited to low voltage applications. Recent PCB framework studies have indicated that it is also possible to use coatings for high voltage insulation. A thin film high voltage isolation technique can be an enabling technology to facilitate the use of a broader range of components and also to make the design and manufacturing process of high voltage assemblies less complex. This activity will define test samples and build a representative breadboard for a potential use case to evaluate and optimise the high voltage design approach in conjunction with reliable coating techniques and design rules.

Directorate: Directorate Telecom Integrated Applica
Estabilishment: ESTEC
ECOS Required: No
Classified: No
Price Range: > 500 KEURO
Authorised Contact Person: Audrey Ferreol
Initiating Service: TIA-TT
IP Measure: N/A
Prog. Reference: E/0534-01G – CC-AT 4.0.1
Tender Type: Open Competition
Open To Tenderers From: AT+BE+CA+CH+CZ+DE+DK+EL+ES+FI+FR+GB+HU+IE+IT+LU+NL+NO+PL+PT+RO+SE
Technology Keywords: 3-D-III-Power Distribution
Products Keywords: 2-L-2/3/4.1-b-Analog: Signal amplifiers