ON CHIP INTEGRATED POWER CONVERTER FOR ADVANCED FIELD PROGRAMMABLE GATE ARRAYS (ARTES AT 5C.440)
18, octombrie 2021

ESA Open Invitation to Tender: 1-10708
Open Date: 20/09/2021 11:23 CEST
Closing Date: 06/12/2021 13:00 CEST

The objective of this activity is to design, manufacture and test an on-chip integrated power converter for high performance Field Programmable Gate Array (FPGA) applications to reduce size and footprint. Targeted Improvements: 50% reduction in FPGA application footprint, fourfold increase in reliability and 20% increase in efficiency. Description: Currently external power supplies are used to power FPGAs in space applications. This limits the performance of the FPGAs, due to unwanted resonances created by an inductive-capacitive interface, which amplifies any current spikes or perturbations. Integrating the power converter into the same package as the FPGA has the potential to overcome the above limitations, allowing for higher FPGA performance and a significant reduction of the interface pin count, as well as improving the reliability. Taking benefit from progress achieved for terrestrial applications, where the power supply is integrated in the microcontroller or FPGA, this activity will further develop the technology for space applications. A concept trade-off will be carried out to select the best integration option, either in a single- or multi-die technology, together with passive component integration. An integrated power converter breadboard will be designed, manufactured and tested in a laboratory environment.Procurement Policy: C(1) = Activity restricted to non-prime contractors (incl. SMEs). For additional information please go to EMITS news „Industrial Policy measures for non-primes, SMEs and RD entities in ESA programmes”.

Directorate: Directorate Telecom Integrated Applica
Estabilishment: ESTEC
ECOS Required: No
Classified: No
Price Range: > 500 KEURO
Authorised Contact Person: Nicole Rinaudo
Initiating Service: TIA-TT
IP Measure: C1
Prog. Reference: E/0534-01G – CC-AT 4.0.1
Tender Type: Open Competition
Open To Tenderers From: AT+BE+CA+CH+CZ+DE+DK+EL+ES+FI+FR+GB+HU+IE+IT+LU+NL+NO+PL+PT+RO+SE
Technology Keywords: 1-C-II-Digital and Analogue Devices and Technologies
Products Keywords: 2-F-1.1-e-General Purpose Programable Logic (PLD, FPGA)

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