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ESA Open Invitation to Tender AO9952
Open Date: 15/07/2019
Closing Date: 23/09/2019 13:00:00
Status: ISSUED
Reference Nr.: 19.154.13
Prog. Ref.: NAVISP Element 1
Budget Ref.: E/0365-10 – NAVISP Element 1
Special Prov.: BE+DK+DE+FR+CH+GB+AT+NL+NO+FI+CZ+RO
Tender Type: C
Price Range: 200-500 KEURO
Products: Satellites & Probes / RF / Microwave Communication (Platform and Payloads) / Receivers / „Navigation Receivers *See AOCS & GNC – Single-frequency (Platform/Low-end missions) – Multiple-frequency (Science mission/hig-end missions)” / Satellites & Probes / RF / Microwave Communication (Platform and Payloads) / Transmitters / X-band, S-Band, Ka band, ¿ / Near Earth application, Deep space application, … / Platform vs Payload / Satellites & Probes / RF / Microwave Communication (Platform and Payloads) / Repeaters and Transceivers / Bent-pipe repeaters, regenarative transponders, … / Satellites & Probes / RF / Microwave Communication (Platform and Payloads) / „Communication – BB (Antennas excluded)” / Analog: Clocks (integrated oscillators, time counters, ¿)
Technology Domains: RF Systems, Payloads and Technologies / RF Technologies and Equipment / RF Devices / RF Systems, Payloads and Technologies / RF Technologies and Equipment / Time and Frequency / Mechanisms / MEMS Technologies / EEE Components and Quality / EEE Component Technologies / Micro Electro Mechanical Systems (MEMS)
Establishment: ESTEC
Directorate: Directorate of Navigation
Department: Strategy and Programme Department
Division: NAVISP Programme Office
Contract Officer: Papaioannou, Maria
Industrial Policy Measure: N/A – Not apply
Last Update Date: 15/07/2019
Update Reason: Tender issue
The objective of this activity is to survey the state-of-the-art and define a proof-of-concept for advanced chip-scale atomic clocks. While vapour-cell based chip scale atomic clocks are moving towards implementation into operational systems, new advanced concepts are being proposed, with potentially multiple benefits in terms of performance and integration. In particular, the recent advancesin micro-machining, packaging, power handling, hybrid integration technologies… shall be analysed and assessed. This shall lead to the definition and demonstration (at prototype level) of a new clock architecture concept and associated technology building blocks targeting improved frequency stability.
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