17, February 2015

ESA Open Invitation To Tender AO8210
Open Date: 11/02/2015
Closing Date: 08/04/2015

Status: ISSUED
Reference Nr.: 14.1EC.01
Prog. Ref.: TRP
Budget Ref.: E/0901-01 – TRP
Tender Type: C
Price Range: > 500 KEURO
Establishment: ESTEC
Directorate: Directorate of Technical & Quality Manag
Department: Electrical Engineering Department
Division: Control Systems Division
Contract Officer: Houten, Marnix
Last Update Date: 11/02/2015
Update Reason: Tender issue

The objective is to propose an architecture for a versatile multi-mission navigation camera suiting most of the needs with high level of integration, and breadboard the proposed design. The activity shall identify : – which detector is the most versatile and suited to fulfil the needs – the synergy with Star Tracker designs and the level of possible re-use – a preliminary electronic architecture identifying the core components needs – the needs in terms of configurability, HW/SW architecture (FPGA, CPU, memories, buses) ESA is currently developing new image sensors, focusing on the Star Tracker application. Those two detectors, namely HAS3 and FaintStar are both working in the visible range. HAS3 targets high performance, low noise and snapshot shutter operation, while Faint Star implements logic on-chip for image (rolling shutter) sequencing, readout, background removal and some functions dedicated to StarTrackers such as star centroiding (through photometric barycentre). The activity will review for each application the vision-based navigation and image processing algorithms and assess the feasibility of implementation at HW or SW level, identifying in particularcommon functions to all applications (which shall target a HW implementation) and custom functions (which could be loaded on a dedicated CPU). The architecture is meant to be highly configurable in order to deal with different type of missions, from interplanetary navigation where synergy with Star Trackers is very high to landing cameras. In order to prepare cameras for future missions requiring navigation, it is proposed to evaluate those detectors and estimate the best architecture to cover very different mission needs. The activity shall trade-off the best balance between hardware and software processing, using configurable State-of-the-hard FPGAs, CPUs, or an FPGA implementing a CPU core. For highly mission-specific processing, the involvement of the future mission OBC CPU shall not be forbidden. As previously mentioned, some functions will be needed for all applications, and some will be mission specific. The activity shall assess how a generic basic HW/SW implementation shall be developed, while mission specific “application” could be tailored mission-by-mission, with the aim to reduce or avoid a global revalidation. For this purpose, the possible use and added-value of dual core processors shall be evaluated. Knowing the missions types will be very different in terms of lighting, field of view requirements and type of targets, it is important to identify how different the different types of optical design will be implemented within a compact structure. In addition, and knowing the camera is to be an external equipment, the possible added value of splitting the camera and the electrical processing unit shall be evaluated.

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