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HIGH PERFORMANCE SILICON VISIBLE HYBRID CMOS IMAGE SENSOR DEMONSTRATOR (PTRP)

on 02 June 2015

ESA Open Invitation To Tender AO8300
Open Date: 22/05/2015
Closing Date: 03/07/2015

Status: ISSUED
Reference Nr.: 15.129.02
Prog. Ref.: EOEP-4 Instr.Pre.Dev;TRP
Budget Ref.: E/0091-E4 - EOEP-4 Instr.Pre.Dev;E/0901-01 - TRP
Special Prov.: BE+DK+FR+DE+IT+NL+ES+SE+CH+GB+IE+AT+NO+FI+PT+GR+LU+CZ+RO+PL
Tender Type: C
Price Range: > 500 KEURO
Establishment: ESTEC
Directorate: Directorate of Technical & Quality Manag
Department: Mechanical Engineering Department
Division: Mechatronics and Optics Division
Contract Officer: Almeida, Rudolfo
Last Update Date: 22/05/2015
Update Reason: Tender issue

One of the difficulties on monlithic approaches for Visible Si CMOS Image sensors is the complexity of the stacking that imposes contraints at pixel level both on the electronic part of the detector (space available to handle capacitors and electronic circuitery)as well as on the optical part (large diminution of fill factor available for example in front side devices due to the electronic parts). An interesting alternative to monolithic approach is the hybrid approach, which is similar to what is done by IR-detector manufacturers. The idea here would be to take advantage of the well established hybridized technology and ROICs, to concentrate the effort for this activity on the optical performances. This first step would therefore be aimed at the detection layer development, withthe use of an existing CMOS ROIC (CTIA for example). The selected company would focus maily on diode performances such as dark current / QE, MTF, and homogeneity aspects. This is a lower risk/ lower cost approach, since the developpement and high risk linked to the ROIC developmenent is avoided here. Note that an advantage of this hybrid philosophy is the potential compatibility with IR detectors ROIC, which means that in a second phase (ie in the frame of a futur TRP if this one is succefull) use of state-of-the art ROICunder development at the moment for Infra-Red application (LFA for example) could be envisaged. OBJECTIVES: To demonstrate the potential of Hybrid technology for high performance Silicon visible CMOS imagers, as an alternative to monolithic approach. For that theaim is : to design, manufacture and test a Silicon hybrid visible CMOS detector. Procurement Policy: C(1) = Activity restricted tonon-prime contractors (incl. SMEs). For additional information please go to EMITS news "Industrial Policy measures for non-primes,SMEs and R&D entities in ESA programmes".

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